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| NL17SZ17 Single Non-Inverting Buffer with Schmitt Trigger The NL17SZ17 is a single Non-inverting Schmitt Trigger Buffer in two tiny footprint packages. The device performs much as LCX multi-gate products in speed and drive. Features http://onsemi.com MARKING DIAGRAMS 5 1 SOT-353/SC70-5/SC-88A DF SUFFIX CASE 419A d = Date Code 5 5 1 SOT-553 XV5 SUFFIX CASE 463B LX D 1 LX D 1 5 LXd * * * * * * Tiny SOT-353 and SOT-553 Packages Source/Sink 24 mA at 3.0 Volts Overvoltage Tolerant Inputs and Outputs Chip Complexity: FETs = 20 Designed for 1.65 V to 5.5 V VCC Operation Pb-Free Packages are Available NC 1 5 VCC A 2 = Device Marking = One Digit Date Code GND 3 4 Y PIN ASSIGNMENT Pin Function NC A GND Y VCC Figure 1. Pinout (Top View) 1 2 3 4 A Y 5 Figure 2. Logic Symbol FUNCTION TABLE A Input L H Y Output L H ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. (c) Semiconductor Components Industries, LLC, 2004 1 December, 2004 - Rev. 6 Publication Order Number: NL17SZ17/D NL17SZ17 MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO ICC IGND TSTG TL TJ qJA PD MSL FR ILatchup ESD DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance Power Dissipation in Still Air at 85C Moisture Sensitivity Flammability Rating Latchup Performance ESD Classification Oxygen Index: 28 to 34 Above VCC and Below GND at 85C (Note 6) Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model SOT-353 (Note 2) SOT-553 SOT-353 SOT-553 Output in High or LOW State (Note 1) VI < GND VO < GND Parameter Value *0.5 to )7.0 *0.5 VI )7.0 *0.5 VO 7.0 *50 *50 $50 $100 $100 *65 to )150 260 )150 350 496 186 135 Level 1 UL 94 V-0 @ 0.125 in 500 Class IC Class A N/A mA Unit V V V mA mA mA mA mA C C C C/W mW Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. IO absolute maximum rating must be observed. 2. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2-ounce copper trace with no air flow. 3. Tested to EIA/JESD22-A114-A, rated to EIA/JESD22-A114-B. 4. Tested to EIA/JESD22-A115-A, rated to EIA/JESD22-A115-A. 5. Tested to JESD22-C101-A. 6. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO TA Dt/DV Supply Voltage Input Voltage, (Note 7) Output Voltage Operating Free-Air Temperature Input Transition Rise or Fall Rate VCC = 2.5 V $0.2 V VCC = 3.0 V $0.3 V VCC = 5.0 V $0.5 V (HIGH or LOW State) Parameter Operating Data Retention Only Min 1.65 1.5 0 0 *40 0 0 0 Max 5.5 5.5 5.5 5.5 )85 No Limit No Limit No Limit Unit V V V C ns/V 7. Unused inputs may not be left open. All inputs must be tied to a high-logic voltage level or a low-logic input voltage level. http://onsemi.com 2 NL17SZ17 DC ELECTRICAL CHARACTERISTICS VCC (V) 1.65 2.3 2.7 3.0 4.5 5.5 1.65 2.3 2.7 3.0 4.5 5.5 1.65 2.3 2.7 3.0 4.5 5.5 IOH = -100 mA IOH = -3 mA IOH = *8 mA IOH = *12 mA IOH = *16 mA IOH = *24 mA IOH = *32 mA IOL = 100 mA IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA VIN = 5.5 V or GND VOUT = 5.5 V VIN = VCC or GND 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 0 to 5.5 0 5.5 TA = 255C Min 0.6 1.0 1.2 1.3 1.9 2.2 0.2 0.4 0.5 0.6 1.0 1.2 0.1 0.25 0.3 0.4 0.6 0.7 VCC *0.1 1.29 1.9 2.2 2.4 2.3 3.8 Typ 1.0 1.5 1.7 1.9 2.7 3.3 0.5 0.75 0.87 1.0 1.5 1.9 0.48 0.75 0.83 0.93 1.2 1.4 VCC 1.52 2.1 2.4 2.7 2.5 4.0 0.08 0.2 0.22 0.28 0.38 0.42 0.1 0.24 0.3 0.4 0.4 0.55 0.55 $0.1 1.0 1.0 Max 1.4 1.8 2.0 2.2 3.1 3.6 0.8 1.15 1.4 1.5 2.0 2.3 0.9 1.1 1.15 1.2 1.5 1.7 *405C v TA v 855C Min 0.6 1.0 1.2 1.3 1.9 2.2 0.2 0.4 0.5 0.6 1.0 1.2 0.1 0.25 0.3 0.4 0.6 0.7 VCC *0.1 1.29 1.9 2.2 2.4 2.3 3.8 0.1 0.24 0.3 0.4 0.4 0.55 0.55 $1.0 10 10 Max 1.4 1.8 2.0 2.2 3.1 3.6 0.8 1.15 1.4 1.5 2.0 2.3 0.9 1.1 1.15 1.2 1.5 1.7 Unit V Symbol VT) Parameter Positive Input Threshold Voltage Condition VT* Negative Input Threshold Voltage V VH Input Hysteresis Voltage V VOH High-Level Output Voltage VIN = VIH or VIL V VOL Low-Level Output Voltage VIN = VIH or VIL V IIN IOFF ICC Input Leakage Current Power Off-Output Leakage Current Quiescent Supply Current mA mA mA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Symbol tPLH tPHL Parameter Propagation Delay Input A to Y (Figures 3 and 4) Condition RL = 1 MW, CL = 15 pF VCC (V) 1.65 1.8 2.5 $ 0.2 3.3 $ 0.3 5.0 $ 0.5 3.3 $ 0.3 5.0 $ 0.5 TA = 255C Min 2.0 2.0 1.0 1.0 0.5 1.5 0.8 Typ 9.1 7.6 5.0 3.7 3.1 4.4 3.7 Max 15 12.5 9.0 6.3 5.2 7.2 5.9 *405C v TA v 855C Min 2.0 2.0 1.0 1.0 0.5 1.5 0.8 Max 15.6 13 9.5 6.5 5.5 7.5 6.2 Unit ns RL = 500 W, CL = 50 pF CAPACITIVE CHARACTERISTICS Symbol CIN CPD Input Capacitance Power Dissi ation Ca acitance Dissipation Capacitance (Note 8) Parameter Condition VCC = 5.5 V, VI = 0 V or VCC 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 10 MHz, VCC = 5.5 V, VI = 0 V or VCC Typical u2.5 9 11 Unit pF pF F 8. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 NL17SZ17 INPUT RL CL OUTPUT A or B 50% VCC GND tPLH tPHL Y 50% VCC A 1 MHz square input wave is recommended for propagation delay tests. Figure 3. Switching Waveforms VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS) 4 Figure 4. Test Circuit 3 2 (VT)) VHtyp 1 (VT*) 2 2.5 3.5 3 VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp = (VT) typ) - (VT* typ) 3.6 Figure 5. Typical Input Threshold, VT), VT* versus Power Supply Voltage VH Vin VCC VT) VT* GND VOH Vout VOL (a) A Schmitt-Trigger Squares Up Inputs With Slow Rise and Fall Times Vout VOL (b) A Schmitt-Trigger Offers Maximum Noise Immunity Vin VH VCC VT) VT* GND VOH Figure 6. Typical Schmitt-Trigger Applications DEVICE ORDERING INFORMATION Device Nomenclature Device Order Number NL17SZ17DFT2 NL17SZ17DFT2G Logic Circuit Indicator NL NL No. of Gates per Package 1 1 Temp Range Identifier 7 7 Device Function 17 17 Package Suffix DF DF Tape and Reel Suffix T2 T2 Package Type Tape/Reel Size Technology SZ SZ SOT-353/SC70-5/ 178 mm, SC-88A 3000 Units SOT-353/SC70-5/ 178 mm, SC-88A 3000 Units (Pb-Free) SOT-553* (Pb-Free) 178 mm, 4000 Units NL17SZ17XV5T2 NL 1 7 SZ 17 XV5 T2 For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free. http://onsemi.com 4 NL17SZ17 PACKAGE DIMENSIONS SOT-353 DF SUFFIX 5-LEAD PACKAGE CASE 419A-02 ISSUE G A G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A-01 OBSOLETE. NEW STANDARD 419A-02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 4 DIM A B C D G H J K N S INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --- 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --- 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 5 S 1 2 3 -B- D 5 PL 0.2 (0.008) M B M N J C H K SOLDERING FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 NL17SZ17 PACKAGE DIMENSIONS SOT-553 XV5 SUFFIX 5-LEAD PACKAGE CASE 463B-01 ISSUE A A -X- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. MILLIMETERS MIN MAX 1.50 1.70 1.10 1.30 0.50 0.60 0.17 0.27 0.50 BSC 0.08 0.18 0.10 0.30 1.50 1.70 BASE 1 EMITTER 1/2 BASE 2 COLLECTOR 2 COLLECTOR 1 INCHES MIN MAX 0.059 0.067 0.043 0.051 0.020 0.024 0.007 0.011 0.020 BSC 0.003 0.007 0.004 0.012 0.059 0.067 STYLE 2: PIN 1. 2. 3. 4. 5. CATHODE ANODE CATHODE CATHODE CATHODE C K 4 5 1 2 3 B -Y- S D G 5 PL M J XY 0.08 (0.003) DIM A B C D G J K S STYLE 1: PIN 1. 2. 3. 4. 5. SOLDERING FOOTPRINT* 0.3 0.0118 0.45 0.0177 1.0 0.0394 1.35 0.0531 0.5 0.5 0.0197 0.0197 SCALE 20:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 6 NL17SZ17/D |
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